Project 07: VM translator part 1

1 files changed, 26 insertions, 0 deletions

diff --git a/projects/hack-vm/arith_logic.py b/projects/hack-vm/arith_logic.py
new file mode 100644
index 0000000..6716ad9
--- /dev/null
+++ b/projects/hack-vm/arith_logic.py
@@ -0,0 +1,26 @@
+from .utils import *
+
+# common preamble to add, sub, and, or
+BINARY_COMMON_ASM = """@SP
+AM=M-1
+D=M
+A=A-1
+"""
+
+# common preamble to neg and not
+UNARY_COMMON_ASM = """@SP
+A=M-1
+"""
+
+ARITH_LOGIC_ASM = {
+    "add": BINARY_COMMON_ASM + "M=D+M\n",
+    "sub": BINARY_COMMON_ASM + "M=M-D\n",
+    "and": BINARY_COMMON_ASM + "M=D&M\n",
+    "or": BINARY_COMMON_ASM + "M=D|M\n",
+    "neg": UNARY_COMMON_ASM + "M=-M\n",
+    "not": UNARY_COMMON_ASM + "M=!M\n",
+}
+
+
+def translate_arith_logic(command):
+    return ARITH_LOGIC_ASM[command]