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Diffstat (limited to 'projects/03/b/RAM4K.hdl')
| -rw-r--r-- | projects/03/b/RAM4K.hdl | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/projects/03/b/RAM4K.hdl b/projects/03/b/RAM4K.hdl new file mode 100644 index 0000000..36b9ec6 --- /dev/null +++ b/projects/03/b/RAM4K.hdl @@ -0,0 +1,28 @@ +// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/b/RAM4K.hdl
+
+/**
+ * Memory of 4K registers, each 16 bit-wide. Out holds the value
+ * stored at the memory location specified by address. If load==1, then
+ * the in value is loaded into the memory location specified by address
+ * (the loaded value will be emitted to out from the next time step onward).
+ */
+
+CHIP RAM4K {
+ IN in[16], load, address[12];
+ OUT out[16];
+
+ PARTS:
+ DMux8Way(in=load, sel=address[9..11], a=l0, b=l1, c=l2, d=l3, e=l4, f=l5, g=l6, h=l7);
+ RAM512(in=in, load=l0, address=address[0..8], out=o0);
+ RAM512(in=in, load=l1, address=address[0..8], out=o1);
+ RAM512(in=in, load=l2, address=address[0..8], out=o2);
+ RAM512(in=in, load=l3, address=address[0..8], out=o3);
+ RAM512(in=in, load=l4, address=address[0..8], out=o4);
+ RAM512(in=in, load=l5, address=address[0..8], out=o5);
+ RAM512(in=in, load=l6, address=address[0..8], out=o6);
+ RAM512(in=in, load=l7, address=address[0..8], out=o7);
+ Mux8Way16(a=o0, b=o1, c=o2, d=o3, e=o4, f=o5, g=o6, h=o7, sel=address[9..11], out=out);
+}
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